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 L6221C L6221CN/CD
QUAD DARLINGTON SWITCH
.FOURNONI .OUTPUTVOLTAGEUPTO60V .OUTPUTCURRENTUPTO1. .VERYLOWSATURATI .TTLCOMPATI .I
ENABLE DESCRIPTION
NVERTING INPUTS WITH
Multiwatt 15
8A ON VOLTAGE BLE INPUTS NTEGRAL FAST RECIRCULATION DIODES
Powerdip 12 + 2 + 2
SO16 + 2 + 2
The L6221 monolithic quad darlington switch is designedfor high current, high voltageswitching applications. Each of the four switches is controlled by a logic input and all four are controlled by a common enableinput.All inputsare TTL-compatiblefor direct connection to logic circuits. Eachswitch consists of an open-collectordarlington transistorplus a fast diodefor switchingapplications with inductivedevice loads. The emitters of thefourswitches are commoned. Any numberof inputs and BLOCK DIAGRAM
ORDERING NUMBERS :L6221C (Powerdip 12+2+2) L6221CN (Multiwatt 15 ) L6221CD (SO16+2+2)
outputs of the same device may be paralleled. Three versions are available : the L6221C mounted in a Powerdip 12 + 2 + 2 package and the L6221CN mounted in a 15--lead Multiwatt package, the L6221CDin SO16+2+2 package.
May 1997
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THERMAL DATA
Symbol Rth j-pins R th j-case R th j-amb Parameter Thermal Resistance Junction-pins Thermal Resistance Junction-case Thermal Resistance Junction-ambient Max. Max. Max. SO20 17 - 80 Powerdip Multiwatt15 14 - 80 - 3 35 Unit C/W C/W C/W
PIN CONNECTIONS (top views)
OUT4 CLAMPB N.C. OUT3 GND GND OUT2 N.C. CLAMPA OUT1
1 2 3 4 5 6 7 8 9 10
D95IN231
20 19 18 17 16 15 14 13 12 11
IN4 IN3 N.C. ENABLE GND GND VS N.C. IN2 IN1
L6221C (Powerdip)
L6221CD (SO20)
L6221CN (Multiwatt-15)
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ABSOLUTE MAXIMUM RATINGS
Symbol VO VS VIN , VEN IC IC IC Top Tstg Isub Ptot Output Voltage Logic Supply Voltage Input Voltage, Enable Voltage Continuous Colllector Current (for each channel) for L6221CD Collector Peak Current (repetitive, duty cycle = 10% ton = 5ms) for L6221CD Collector Peak Current (non repetitive, t = 10s) for L6221CD Operating Temperature Range (junction) Storage Temperature Range Output Substrate Current Total Power Dissipation at at at at at at Tpins = 90C (powerdip) Tcase = 90C (multiwatt) Tcase = 90C (SO20) Tamb = 70C (powerdip) Tamb = 70C (multiwatt) Tamb = 70C (SO20) Parameter Value 60 7 VS 1.8 1.2 2.5 1.7 3.2 2.2 -40 to +150 -55 to +150 350 4.3 20 3.5 1 2.3 1 A A A A A A C C mA W W W W W W Unit V V
TRUTH TABLE
Enable H H L
For each input : H = High level L = Low level X = Don't care
Input H L X
Power Out ON OFF OFF
PIN FUNCTIONS (see block diagram)
Name IN 1 IN 2 OUT 1 OUT 2 CLAMP A IN 3 IN 4 OUT 3 OUT 4 CLAMP B ENABLE VS GND Input to Driver 1 Input to Driver 2 Output of Driver 1 Output of Driver 2 Diode Clamp to Driver 1 and Driver 2 Input to Driver 3 Input to Driver 4 Output of Driver 3 Output of Driver 4 Diode Clamp to Driver3 and Driver 4 Enable Input to All Drivers Logic Supply Voltage Common Ground Function
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ELECTRICAL CHARACTERISTICS Refer to The Test Circuit to Fig.1 to Fig.9 (VS = 5V, Tamb = 25C unless otherwise specified)
Symbol VS IS ICEX VCE(sat) Parameter Logic Supply Voltage Logic Supply Current Output Leakage Current Collector Emitter Saturation Voltage (one input on; all others inputs off). VINL, V ENL Input Low Voltage IINL, IENL IINH, IENH IR VF td(on) td(off) IS Input Low Current Input High Current Clamp Diode Leakage Current Clamp Diode Forward Voltage Turn on Delay Time Turn off Delay Time Logic Supply Current Variation VIN = VIN L VEN = VEN L 2 VIN = VIN H VEN = VEN H VR = 60V VEN = VENH VIN = VIN L IF = 1A IF = 2A (*) VP = 5V RL = 10 VP = 5V RL = 10 VIN = 5V VEN = 5V Iout = -500mA for Each Channel 100 100 1.8 2.2 2 5 150 VINH, V ENH Input High Voltage All outputs ON IC = 0.7A All outputs OFF VCE = 60V VEN = VENH VIN = VIN L VS = 4.5V VIN = VIN H VEN = VENH IC = 1A (*) IC = 2A Test Condition Min. 4.5 Typ. Max. 5.5 20 20 1 Unit V mA mA mA
1.4 1.85 0.8 -100
V V V A V A A V V ms s mA
(*) Only for L6221C - L6221CN types
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TEST CIRCUITS (X) = Referred to Multiwatt package X = Referred to Powerdip package Figure 1 : Logic supply current.
Set V IN = 4.5V,V EN = 0.8V, or V IN = 0.8V, V EN = 4.5V, for I S (all outputs off) Set V IN = 2V, V EN = 2V, for I S (all outputs on)
Figure 2 : Output Sustaining Voltage.
Figure 3 : Output Leakage Current.
VP = +60V
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Figure 4 : Collector-emitter Saturation Voltage. Figure 5 : Logic Input Characteristics.
Set Set Set Set
S1, S2 open, VIN, VEN = 0.8V for IIN L, IEN L S1, S2 open, VIN, V EN = 2V for I IN H, IEN H S1, S2 close, VIN, VEN = 0.8V for VIN L, VEN L S1, S2 close, V IN, VEN = 2V for VIN H, VEN H
Figure 6 : Clamp Diode Leakage Current.
Figure 7 : Clamp Diode Forward Voltage.
VP = +60V
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Figure 8 : Switching Times Test Circuit. Figure 9 : Switching TImes Waveforms.
Figure 10 : Allowed Peak Collector Current vs. Duty Cycle for 1, 2, 3 or 4 Contemporary Working Outputs (L6221C).
Figure 11 : Allowed Peak Collector Current vs. Duty Cycle for 1, 2, 3 or 4 Contemporary Working Outputs (L6221CN).
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Figure 12 : Collector Saturation Voltage vs. Collector Current. Figure 13 : Free-wheeling Diode Forward Voltage vs. Diode Current .
Figure 14 : Collector Saturation Voltage vs. Junction Temperature at IC = 1A.
Figure 15 : Free-wheeling Diode Forward Voltage vs. Junction Temperature at IF = 1A.
Figure 16 : Saturation Voltage vs. Junction Temperature at IC = 1.8A.
Figure 17 : Free-wheeling Diode Forward Voltage vs. Junction Temperature at If = 1.8A.
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Figure 18. APPLICATION INFORMATION When inductive loads are driven by L6221C/CD, a zener diode in series with the integral free-wheeling diodes increases the voltage across which energy stored in the load is discharged and therefore speeds the current decay (fig. 18). The zener has to be chosen in such a way that VCLAMP is limited to 60V taking into account the zener'svoltage changesdue to: spread on VZ, temperature changes, and the voltage drop due to ohmic resistance. Moreover, the instantaneouspower must be limited in order to avoid the reverse second breakdown.
Figure 19 : Driver for Solenoids up to 3A.
Some care must be taken to ensure that the collectors are placed close togetherto avoid different current partitioning at turn-off. We suggest to put in parallel channel 1 and 4 and channel2 and 3 as shown in figure 19 for the similar
electrical characteristics of the logicsection (turn-on and turn-off delay time) and the power stages (collector saturation voltage, free-wheeling diode forward voltage).
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Figure 20 : Saturation Voltage vs. Collector Current. Figure 21 : Peak Collector Current vs. Duty Cycle for 1 or 2 Paralleled Outputs Driven (L6221N).
Figure 22 : Peak Collector Current vs. Duty Cycle for 1 or 2 Paralleled Outputs Driven (L6221CN).
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MOUNTING INSTRUCTION The Rth j-amb of the L6221C can be reduced by solderingthe GND pins to a suitablecopperarea of the printed circuit board (Fig. 23) or to an external heatsink (Fig. 24). The diagram of figure 25 shows the maximum dissipable power Ptot and the Rth j-amb as a function of the side " " of two equal square copper areas havFigure 23 : Example of P.C. Board Copper Area Which is Used as Heatsink.
ing a thickness of 35 (1.4 mils). During soldering the pins temperature must not exceed 260 C and the soldering time must not be longer than 12 seconds. The external heatsink or printed circuit copper area must be connected to electrical ground. Figure 24 : External Heatsink Mounting Example.
Figure 25 : Maximum Dissipable Power and Junction to Ambient Thermal Resistance vs. Side " ".
Figure 26 : Maximum Allowable Power Dissipation vs. Ambient Temperature.
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MULTIWATT15 PACKAGE MECHANICAL DATA
DIM. MIN. A B C D E F G G1 H1 H2 L L1 L2 L3 L4 L7 M M1 S S1 Dia1 22.1 22 17.65 17.25 10.3 2.65 4.2 4.5 1.9 1.9 3.65 4.3 5.08 17.5 10.7 0.49 0.66 1.14 17.57 19.6 20.2 22.6 22.5 18.1 17.75 10.9 2.9 4.6 5.3 2.6 2.6 3.85 0.870 0.866 0.695 0.679 0.406 0.104 0.165 0.177 0.075 0.075 0.144 0.169 0.200 0.689 0.421 1.27 17.78 1 0.55 0.75 1.4 17.91 0.019 0.026 0.045 0.692 0.772 0.795 0.890 0.886 0.713 0.699 0.429 0.114 0.181 0.209 0.102 0.102 0.152 0.050 0.700 mm TYP. MAX. 5 2.65 1.6 0.039 0.022 0.030 0.055 0.705 MIN. inch TYP. MAX. 0.197 0.104 0.063
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POWERDIP16 PACKAGE MECHANICAL DATA
DIM. MIN. a1 B b b1 D E e e3 F I L Z 3.30 1.27 8.80 2.54 17.78 7.10 5.10 0.130 0.050 0.38 0.51 0.85 0.50 0.50 20.0 0.346 0.100 0.700 0.280 0.201 0.015 1.40 mm TYP. MAX. MIN. 0.020 0.033 0.020 0.020 0.787 0.055 inch TYP. MAX.
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SO20 PACKAGE MECHANICAL DATA
DIM. MIN. A a1 a2 b b1 C c1 D E e e3 F L M S 7.4 0.5 12.6 10 1.27 11.43 7.6 1.27 0.75 8 (max.) 0.291 0.020 13.0 10.65 0.35 0.23 0.5 45 (typ.) 0.496 0.394 0.050 0.450 0.299 0.050 0.030 0.512 0.419 0.1 mm TYP. MAX. 2.65 0.3 2.45 0.49 0.32 0.014 0.009 0.020 0.004 MIN. inch TYP. MAX. 0.104 0.012 0.096 0.019 0.013
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Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. (c) 1997 SGS-THOMSON Microelectronics - Printed in Italy - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.
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